Network-on-Chip

Limitations of bus-based interconnections related to scalability, latency, bandwidth, and power consumption for supporting the related huge number of on-chip resources result in a communication bottleneck. These challenges can be efficiently addressed with the implementation of a network-on-chip (No...

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Bibliographic Details

Format:	Online
Language:	English
Published:	IntechOpen 2022
Subjects:	Circuits & components thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TJ Electronics and communications engineering::TJF Electronics engineering::TJFC Electronics: circuits and components
Online Access:	ONIX_20220727_9781839681585_135
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